Crystal oscillators are workhorses of modern computing devices, providing stable references used to derive clocks, tones, and waveforms that set performance limits of the computing devices. For example, a crystal oscillator may be used to derive a system clock of an application-specific integrated circuit (ASIC), and performance of the ASIC may depend on the stability of the oscillator and system clock derived from it. Therefore, the ASIC may contain circuitry to compensate for losses in the crystal oscillator and losses due to coupling the crystal oscillator to the ASIC.
Circuitry on a chip, a field-programmable gate array (FPGA), a processor, or ASIC coupled with a crystal oscillator may include compensation and control circuitry, such as sense circuitry and bias control circuitry that are designed to set a bias voltage on a transistor connected across two ports of the crystal oscillator. The sense circuitry senses a common mode signal across the two ports of the crystal oscillator, and the bias control circuitry sets a bias voltage on the transistor to compensate for loss. Often, the bias control circuitry includes an operation amplifier (op-amp) driven on one input with a voltage provided by a voltage reference generator. The op-amp and voltage reference generator, however, introduce noise and may not be suitable for use with some protocols and standards. For example, IEEE 802.11ac requires phase noise performance that may not be achievable with available op-amps and voltage reference generators.